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November 2006 rev 0.2 LCD Panel EMI Reduction IC Features * * * * * * * * * * * * * Provides up to 15dB of EMI suppression FCC approved method of EMI attenuation Generates a low EMI spread spectrum clock of the input frequency 30MHz to 100MHz input frequency range Optimized for 32.5MHz, 54MHz, 65MHz, 81MHz, pixel clock frequencies Internal loop filter minimizes external components and board space 8 selectable spread ranges, up to +/- 2.0% SSON# control pin for spread spectrum enable and disable options Low cycle-to-cycle jitter 3.3V operating voltage Ultra low power CMOS design Supports most mobile graphic accelerator and LCD timing controller specifications Available in 8 pin SOIC and TSSOP Packages. P2040B reducing the number of circuit board layers and shielding that are traditionally required to pass EMI regulations. The P2040B uses the most efficient and optimized modulation profile approved by the FCC and is implemented in a proprietary all digital method. The P2040B modulates the output of a single PLL in order to "spread" the bandwidth of a synthesized clock and, more importantly, harmonics. This results in significantly lower system EMI compared to the typical narrow band signal produced by oscillators and most frequency generators. Lowering EMI by increasing a signal's bandwidth is called "spread spectrum clock generation". decreases the peak amplitudes of its Applications The P2040B is targeted towards digital flat panel applications for Notebook PCs, Palm-size PCs, Office Automation Equipments and LCD Monitors. Product Description The P2040B is a selectable spread spectrum frequency modulator designed specifically for digital flat panel applications. The P2040B reduces electromagnetic interference (EMI) at the clock source which provides system wide reduction of EMI of all clock dependent signals. The P2040B allows significant system cost savings by Block Diagram SR0 CP1 CP0 SSON# VDD Modulation CLKIN Frequency Divider Feedback Divider PLL Phase Detector Loop Filter VCO Output Divider ModOUT VSS PulseCore Semiconductor Corporation 1715 S. Bascom Ave Suite 200, Campbell, CA 95008 * Tel: 408-879-9077 * Fax: 408-879-9018 www.pulsecoresemi.com Notice: The information in this document is subject to change without notice. November 2006 rev 0.2 Pin Configuration CLKIN CP0 CP1 VSS 1 2 3 4 8 7 6 5 VDD SR0 ModOUT SSON# P2040B P2040B Deviations and Modulation Rate Table CP0 0 0 0 0 1 1 1 1 CP1 0 0 1 1 0 0 1 1 SR0 0 1 0 1 0 1 0 1 Spreading Range (+/- %) 32.5MHz 0.56 1.94 1.36 1.92 1.24 1.91 0.91 1.47 54MHz 1.05 1.68 1.05 1.68 0.81 1.29 0.45 0.71 65MHz 1.00 1.56 1.00 1.56 0.66 1.02 0.34 0.54 81MHz 0.98 1.48 0.92 1.48 0.40 0.74 0.05 0.36 Modulation Rate (Fin/40) * 62.49KHz (Fin/40) * 62.49KHz (Fin/40) * 62.49KHz (Fin/40) * 62.49KHz (Fin/40) * 62.49KHz (Fin/40) * 62.49KHz (Fin/40) * 62.49KHz (Fin/40) * 62.49KHz Pin Description Pin# 1 2 3 4 5 6 7 8 Pin Name CLKIN CP0 CP1 VSS SSON# ModOUT SR0 VDD Type I I I P I O I P Description External reference frequency input. Connect to externally generated reference signal. Digital logic input used to select charge pump current (see Table 1). This pin has a 100K Ohm internal pull-up resistor. Digital logic input used to select charge pump current (see Table 1). This pin has a 100K Ohm internal pull-up resistor. Ground Connection. Connect to system ground. Digital logic input used to enable Spread Spectrum function (Active LOW). Spread Spectrum function enable when LOW. This pin has a 100K Ohm internal pull-low resistor. Spectrum Clock output Digital logic input used to select Spreading Range (see Table 1) This pin has a 100K Ohm internal pull-up resistor. Connect to +3.3V LCD Panel EMI Reduction IC Notice: The information in this document is subject to change without notice. 2 of 8 November 2006 rev 0.2 Spread Spectrum Selection P2040B Table 1 illustrates the possible spread spectrum options. The optimal setting should minimize system EMI to the fullest without affecting system performance. The spreading is described as a percentage deviation of the center frequency (Note: the center frequency is the frequency of the external reference input on CLKIN, Pin 1). Example: P2040B is designed for high resolution flat panel applications and is able to support panel frequencies from 30MHz to 100MHz. For a 65MHz pixel clock frequency, a spreading selection of CP0 = 0,CP1=1 and SR0=1 gives a percentage deviation of +/-1.56% (see Table 1). This results in frequency on ModOUT being swept from 64.5MHz to 65.5MHz. This particular example given here is a common EMI reduction method for notebook LCD panel and has already been implemented by most of the leading OEM and mobile graphic accelerator manufacturers. Application Schematic for Mobile LCD Graphics Controllers +3.3V 65MHz from Graphics Modulation 65MHz signal with +/- 1.56% Deviation and Modulation Rate of 101.54 KHz. This signal is connected back to the Spread Spectrum input Pin (SSIN) of the Graphics Accelerator. 1 2 3 4 CLKIN CP0 CP1 VSS VDD SR0 8 7 0.1 F ModOUT 6 SSON# 5 P2040B Digital control for SS enable or disable Absolute Maximum Ratings Symbol VDD, VIN TSTG TA Ts TJ TDV Storage temperature Operating temperature Max. Soldering Temperature (10 sec) Junction Temperature Static Discharge Voltage (As per JEDEC STD22- A114-B) Parameter Voltage on any pin with respect to Ground Rating -0.5 to +4.6 -65 to +125 -40 to +85 260 150 2 Unit V C C C C KV Note: These are stress ratings only and are not implied for functional use. Exposure to absolute maximum ratings for prolonged periods of time may affect device reliability. LCD Panel EMI Reduction IC Notice: The information in this document is subject to change without notice. 3 of 8 November 2006 rev 0.2 DC Electrical Characteristics Symbol VIL VIH IIL IIH VOL VOH IDD ICC VDD tON ZOUT Input Low voltage Input High voltage Input Low current (100K input pull-up resistor on inputs SR0, CP1and CP0) Input High current (100K input pull-low resistor on input SSON#) Output Low current Output High current Static Supply Current Dynamic Supply Current (3.3V and 15pF loading) Operating Voltage Power up time (first locked clock cycle after power up) Clock Output impedance VDD = 3.3V, IOL = 20mA VDD = 3.3V, IOH = 20mA P2040B Parameter Min VSS - 0.3 2.0 2.5 9 3.0 - Typ 0.6 16 3.3 0.18 50 Max 0.8 VDD + 0.3 -35 35 0.4 22 3.6 - Unit V V A A V V mA mA V mS AC Electrical Characteristics Symbol fIN fOUT tLH1 tHL 1 Parameter Input Frequency Output Frequency Output Rise time Output Fall time Jitter (cycle to cycle) Output Duty cycle Measured at 0.8V to 2.0V Measured at 2.0V to 0.8V Min 30 30 0.7 0.6 45 Typ 0.9 0.8 360 50 Max 100 100 1.1 1.0 55 Unit MHz MHz nS nS pS % tJC tD Note: 1. tLH and tHL are measured into a capacitive load of 15pF LCD Panel EMI Reduction IC Notice: The information in this document is subject to change without notice. 4 of 8 November 2006 rev 0.2 Package Information 8-lead (150-mil) SOIC Package P2040B E H D A2 A e B A 1 C L D Dimensions Symbol Min A1 A A2 B C D E e H L Inches Max 0.010 0.069 0.059 0.020 0.010 0.004 0.053 0.049 0.012 0.007 Millimeters Min Max 0.10 1.35 1.25 0.31 0.18 4.90 BSC 3.91 BSC 1.27 BSC 6.00 BSC 0.41 0 1.27 8 0.25 1.75 1.50 0.51 0.25 0.193 BSC 0.154 BSC 0.050 BSC 0.236 BSC 0.016 0 0.050 8 LCD Panel EMI Reduction IC Notice: The information in this document is subject to change without notice. 5 of 8 November 2006 rev 0.2 8-lead Thin TSSOP(4.40-MM Body) P2040B H E D A2 A e B A1 L C Dimensions Symbol Min A A1 A2 B c D E e H L 0.020 0 0.002 0.033 0.008 0.004 0.114 0.169 0.026 BSC 0.252 BSC 0.028 8 0.50 0 Inches Max 0.043 0.006 0.037 0.012 0.008 0.122 0.177 0.05 0.85 0.19 0.09 2.90 4.30 Millimeters Min Max 1.10 0.15 0.95 0.30 0.20 3.10 4.50 0.65 BSC 6.40 BSC 0.70 8 LCD Panel EMI Reduction IC Notice: The information in this document is subject to change without notice. 6 of 8 November 2006 rev 0.2 Ordering Information Part number P2040BF-08-ST P2040BF-08-SR P2040BG-08-ST P2040BG-08-SR P2040BF-08-TT P2040BF-08-TR P2040BG-08-TT P2040BG-08-TR I2040BF-08-TT I2040BF-08-TR I2040BG-08-TT I2040BG-08-TR I2040BF-08-ST I2040BF-08-SR I2040BG-08-ST I2040BG-08-SR P2040B Marking P2040BF P2040BF P2040BG P2040BG P2040BF P2040BF P2040BG P2040BG I2040BF I2040BF I2040BG I2040BG I2040BF I2040BF I2040BG I2040BG Package Configuration 8-Pin SOIC, Tube, Pb Free 8-Pin SOIC, Tape and Reel, Pb Free 8-Pin SOIC, Tube, Green 8-Pin SOIC, Tape and Reel, Green 8-Pin TSSOP, Tube, Pb Free 8-Pin TSSOP, Tape and Reel, Pb Free 8-Pin TSSOP, Tube, Green 8-Pin TSSOP, Tape and Reel, Green 8-Pin TSSOP, Tube, Pb Free 8-Pin TSSOP, Tape and Reel, Pb Free 8-Pin TSSOP, Tube, Green 8-Pin TSSOP, Tape and Reel, Green 8-Pin SOIC, Tube, Pb Free 8-Pin SOIC, Tape and Reel, Pb Free 8-Pin SOIC, Tube, Green 8-Pin SOIC, Tape and Reel, Green Temperature Range Commercial Commercial Commercial Commercial Commercial Commercial Commercial Commercial Industrial Industrial Industrial Industrial Industrial Industrial Industrial Industrial Device Ordering Information P2040B F-08-ST SR - SOIC, T/R TT - TSSOP, TUBE TR - TSSOP, T/R ST - SOIC, TUBE Pin Count F =Lead Free and and RoHS compliant part G = GREEN PACKAGE, LEAD FREE, and RoHS Deviation (%) and Spread option Identifier DEVICE NUMBER P = Commercial Temperature Range (0C to 70C) I = Industrial Temperature Range (-40C to 85C) Licensed under US patent #5,488,627, #6,646,463 and #5,631,920. LCD Panel EMI Reduction IC Notice: The information in this document is subject to change without notice. 7 of 8 November 2006 rev 0.2 P2040B PulseCore Semiconductor Corporation 1715 S. Bascom Ave Suite 200 Campbell, CA 95008 Tel: 408-879-9077 Fax: 408-879-9018 www.pulsecoresemi.com Copyright (c) PulseCore Semiconductor All Rights Reserved Preliminary Information Part Number: P2040B Document Version: v0.2 Note: This product utilizes US Patent # 6,646,463 Impedance Emulator Patent issued to PulseCore Semiconductor, dated 11-11-2003 (c) Copyright 2006 PulseCore Semiconductor Corporation. All rights reserved. Our logo and name are trademarks or registered trademarks of PulseCore Semiconductor. All other brand and product names may be the trademarks of their respective companies. PulseCore reserves the right to make changes to this document and its products at any time without notice. PulseCore assumes no responsibility for any errors that may appear in this document. The data contained herein represents PulseCore's best data and/or estimates at the time of issuance. PulseCore reserves the right to change or correct this data at any time, without notice. If the product described herein is under development, significant changes to these specifications are possible. The information in this product data sheet is intended to be general descriptive information for potential customers and users, and is not intended to operate as, or provide, any guarantee or warrantee to any user or customer. PulseCore does not assume any responsibility or liability arising out of the application or use of any product described herein, and disclaims any express or implied warranties related to the sale and/or use of PulseCore products including liability or warranties related to fitness for a particular purpose, merchantability, or infringement of any intellectual property rights, except as express agreed to in PulseCore's Terms and Conditions of Sale (which are available from PulseCore). All sales of PulseCore products are made exclusively according to PulseCore's Terms and Conditions of Sale. The purchase of products from PulseCore does not convey a license under any patent rights, copyrights; mask works rights, trademarks, or any other intellectual property rights of PulseCore or third parties. PulseCore does not authorize its products for use as critical components in life-supporting systems where a malfunction or failure may reasonably be expected to result in significant injury to the user, and the inclusion of PulseCore products in such life-supporting systems implies that the manufacturer assumes all risk of such use and agrees to indemnify PulseCore against all claims arising from such use. LCD Panel EMI Reduction IC Notice: The information in this document is subject to change without notice. 8 of 8 |
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